Tallinn University of Technology is the only technical university in Estonia, and it is the flagship of Estonian engineering and technology education. TalTech is cooperating with world-leading technology companies and universities and is in charge of nurturing the next generation of engineers and advancing engineering culture in Estonia, contributing to the sustainable development of society and increasing national prosperity with its innovative services. The R&D related to AI-chip design is initiated by a cluster of research groups constituting TalTech Chips Cluster that will be formalised as an outcome of the TAICHIP. The core of the cluster is established by the Centre for Trustworthy and Efficient Computing Hardware (TECH) led by Prof. M. Jenihhin (coordinator for TAICHIP), and involves several tightly collaborating groups (including co-supervision of PhD students and co-authorship of publications) in the Department of Computer Systems and the Department of Electronics (i.e., the research groups of Prof. Samuel Pagliarini, Prof. Jaan Raik and Prof. Yannick Le Moullec) and the Centre of Studies for Computer Systems (Prof. Peeter Ellervee).

The Leibniz Institute for High Performance Microelectronics (IHP) is a worldwide leading competence centre for Silicon-Germanium technology, with cutting-edge R&D in silicon-based systems and a chip manufacturing facility (e.g., IHP open-source PDK for 130nm SiGe BiCMOS technology). The participating unit specialises in applied reliability modelling, fault-tolerance analysis across a stack of digital system layers, and design of fault-tolerant integrated circuits. Several fault-tolerant chips designed by IHP team are commercially available. IHP’s rad-hard 250nm technology is part of the ESA - EPPL (European Space Agency - European Preferred Parts List), and the rad-hard 130nm technology will soon be included in this list. Two IHP’s chips are onboard ESA’s Jupiter Icy Moon Explorer, launched in April 2023.

The École Centrale de Lyon (ECL) is one of the leading scientific graduate schools in France that excels in the research fields of acoustics, biosciences and nanotechnology. The involved group is among the leaders in the international research community in the spectrum of topics of Approximate Computing (AxC) from circuits to AI applications. Moreover, Prof. Alberto Bosio and Prof. Ian O’Connor are deeply involved in the organisation (General and Program Chairs) of the main international conferences in the domain of design automation and test, such as IEEE/ACM DATE and IEEE ETS.

The University of Manchester (UOM) is a public research university with a long tradition of strong research, education and administration processes organisation that ranked #32 in the QS World University Rankings for 2024. The involved APT research group (Advanced Processor Technologies) is one of the leading groups worldwide in brain-inspired computing platforms, with a historical focus on the simulation of spiking neural networks and with a more recent one on open-source conventional deep learning acceleration. Current research activities range from the NVIDIA DL Accelerator (NVDLA) open architecture to the breakthrough 10-Million-core SpiNNaker2 machine.

Swiss Federal Institute of Technology Zürich (ETHZ) is ranked #7 in the QS rating. The involved team of Prof. Luca Benini is one of the leading groups in the international community in the design of open-source computing architectures renowned among all for their PULP-platform project (https://pulp-platform.org/). In the last 10 years, the group has designed, implemented and tested more than 50 Application Specific Integrated Circuits (ASICs), all of which were based on RTL code and testbenches released using a permissive license. ETH Zürich is one of the founding members of RISC-V international and, since 2015, has been developing processor cores for various applications. In the meantime, several of the cores developed by the group have found new homes, such as Zeroriscy (small 32bit RISC-V core), renamed as Ibex and maintained by LowRISC (https://lowrisc.org/), Ariane as CVA6 and RI5CY as CV32E40P both maintained by the OpenHW group (https://www.openhwgroup.org/). The processor architectures and cores developed by ETH Zürich have been used extensively both in industry and academia in a variety of roles, from research demonstrators to all the way to actual products. For more than 35 years, ETH Zürich has been very active in developing its own ASICs and has created an infrastructure that allows the design and test, and adapted the curriculum to allow students already in BSc and MSc levels to be able to work on implementing their own designs as ASICs.